Instructor: Stan Warford

Office: RAC 112

Office hours: Monday (11:00-11:50), Tuesday (9:00-9:50), Thursday (1:00-1:50), Friday (11:00-11:50), and by appointment.

Email: Message to Warford

A1, A2, A3, A4, A5, A6, A7, A8, Test 1

A9, A10, A11, A12, A13, A14, A15, A16, Test 2

A17, A18, A19, A20, A21, A22, A23, A24, Final

L1, L2, L3, L4, L5, L6

Announcements |

Download errata page for

Download lecture slides, Chapter 3 for

Download lecture slides, Chapter 8 for

Download lecture slides, Chapter 9 for

Download lecture slides, Chapter 10 for

Download lecture slides, Chapter 11 for

Download lecture slides, Chapter 12 for

First day of Lab 1: January 15 (rescheduled for January 22)

First day of Lab 2: January 29

First day of Lab 3: February 12

First day of Lab 4: February 26 (rescheduled for March 11)

First day of Lab 5: March 25

First day of Lab 6: April 8 (rescheduled for April 15)

Download parts list for the labs.

Download data sheet for 7400, 7402, 7404, 7408, 7432, 7447, 7476, 7485, 7486, 74151, 74164, 74176-177, 74181, MAN71A.

You can also view just the lectures directly in your browser here.

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The University does hold a traditional copyright for the lecture video recordings.

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Out of Bounds, Gerard J. Holzmann,

RISC-V home page, A new open-source ISA hardware processor.

RISC-V Offers Simple Modular ISA, David Kanter,

The End of (Numeric) Error: An Interview with John L. Gustafson, Walter Tichy,

An Energy-Efficient and Massively Parallel Approach to Valid Numbers, John L. Gustafson, Slide presentation on the Unum floating-point format, March 2015.

New CISC Architecture Takes on RISC, Bernard Cole,

Power Struggles: Revisiting the RISC vs. CISC Debate on Contemporary ARM and x86 Architectures, Emily Blem, Jaikrishnan Menon, and Karthikeyan Sankaralingam,

The Battle Between ARM and Intel Gets Real, Rachel Courtland,

The Tyranny of the Clock, Ivan Sutherland,

Computing Performance: Game Over or Next Level?, Samuel H. Fuller, Lynette I. Millett,

RISC vs. CISC in the mobile era, Jon Stokes,

Assignments |

Study Chapter 10.1, 10.2

Chapter 10: Exercises 2, 8, 9(c), 11(a), 15(g, j, m), 16(g, j, m), 17(g, j, m)

Basic Logic Gates

Chapter 10: Exercises 21(b, d, g, i), 22(b, d, g, i)

Study Chapter 10.3

Chapter 10: Exercises 23(a, f), 24(a, f), 25, 27(b, d, g, i), 28(a, f), 31(b, i), 32(b, i)

For 32, use a Karnaugh map to find the minimum of

Study Chapter 10.4

Chapter 10: Exercises 33(b, c, d), 34(b, c, d), 35(c), 36(c)

For 34, use a Karnaugh map to find the minimum of

Combinational Logic Circuits

Lab 1 due

Chapter 10: Exercises 41, 43, 46, 47

For Exercise 41, use only the two multiplexers and AND, OR, and INVERT gates.

Study Chapter 11.1

Chapter 10: Exercises 53, 54(c)

Chapter 10: Exercises 52(b), 54(g), 55

Chapter 11: Exercises 2, 3

Sequential Circuits: Flip-flops and Shift Registers

Lab 2 due

Chapters 10, 11.1 through The Master-Slave SR Flip-Flop, Labs 1, 2

Study Chapter 11.2

Chapter 11: Exercises 5, 7, 8(d, f, h)

For Exercises 7 and 8, design a minimum AND-OR circuit, show the design table and Karnaugh map, and draw the non-abbreviated circuit with the flip-flop.

Chapter 11: Exercises 10, 11

Study Chapter 11.3

Chapter 11: Exercises 13(b), 14(a)

A Combined Combinational-Sequential System

Lab L3 due

Chapter 11: Exercise 18

Chapter 11: Exercises 19, 20, 21

Study Fifth edition Chapter 12.1

No written exercises.

Chapter 11: Exercises 22, 23

Fifth edition Chapter 12: Exercise 2

Fifth edition Chapter 12: Exercises 3, 4

Fifth edition Chapter 12: Problem 28

For Problem 28, use the "Copy to Microcode" button in the Help system to copy the unit test, which you must include unchanged in every microprogram.

Document your code with name, date, and assignment, which you must include in every microprogram.

Combine cycles as much as possible, which you must do for every microprogram.

Name your file

`xxProb1228.pepcpu`

where `xx`

is your assigned two-digit number for this course.Note the upper-case P.

Submit your assignment on Courses.

Variable Modulus Decade Counter with Display

Lab 4 due

Start working on Assignment 18.

Fifth edition Chapter 12: Problem 29(e)

Fifth edition Chapter 12: Problem 29(f)

Fifth edition Chapter 12: Problem 30

Name your files

`xxProb1229e.pepcpu`

, `xxProb1229f.pepcpu`

, and `xxProb1230.pepcpu`

where `xx`

is your assigned two-digit number for this course.Note the upper-case P.

Study fifth edition Chapter 12.2

Fifth edition Chapter 12: Problem 32(e)

Fifth edition Chapter 12: Problem 33(d)

Name your files

`xxProb1232e.pepcpu`

and `xxProb1233d.pepcpu`

where `xx`

is your assigned two-digit number for this course.Note the upper-case P.

Fifth edition Chapter 12: Problem 35(e)

Fifth edition Chapter 12: Problem 36(d)

Report the percentage savings in the number of cycles in the documentation of the microprogram. Name your files

`xxProb1235e.pepcpu`

and `xxProb1236d.pepcpu`

where `xx`

is your assigned two-digit number for this course.Note the upper-case P.

Arithmetic Logic Unit

Lab 5 due

Study fifth edition Chapter 12.3, 12.4

Fifth edition Chapter 12: Exercises 6, 7, 8, 11

Fifth edition Chapter 12: Exercises 14, 15, 16

Study fifth edition Chapter 3.5

Extra credit, study Chapter 9.4, 9.5

Fifth edition Chapter 12: Exercises 17(a), 18, 20

Fifth edition Chapter 12: Exercises 22, 25

Fifth edition Chapter 3: Exercises 50, 51, 52(a, b, c), 53(a, b, c)

Here is a worksheet for Exercise 12.22.

Extra credit

Chapter 9: Exercises 12, 13, 15, 16

Cumulative, but with emphasis on material after Test 2.